Full Name
Mahatennage Pubudu Udara Premathilaka

Preferred Name
Pubudu Premathilaka

Registration Number
E/15/280

Department
Computer Engineering


Residence
Kandy

Current Affiliation
SyscoLabs-Sri Lanka
Projects
Accelerating Adaptive Banded Event Alignment Algorithm with OpenCL on FPGA
Accelerating Adaptive Banded Event Alignment Algorithm with OpenCL on FPGA
Undergraduate Research Projects
Intelligent Road Traffic Control System
Intelligent Road Traffic Control System
Cyber-Physical Systems Projects